Search results for "Transistor array"
showing 2 items of 2 documents
On the optimal design of multi-stage cascaded transistor amplifiers with noise, gain and mismatch constraints
2007
The problem of evaluating the optimal performances of cascaded, unbalanced, multi-stage transistor amplifiers is addressed. In particular, a theoretically rigorous approach is proposed for the determination of a family of Optimal Design Curves (ODC's) which express the best noise-gain tradeoff that can be achieved - at each frequency and device operating condition - when a simultaneous constraint on amplifier input VSWR is accounted for. Such curves can be used as a more meaningful starting point in practical amplifier design in place of the approximate calculations so far employed for target performance or optimization goals determination.
On the Theoretical Limits of Noise-Gain-Mismatch Tradeoff in the Design of Multi-Stage Cascaded Transistor Amplifiers
2007
The problem of evaluating the limit performances of cascaded single-ended multi-stage transistor amplifiers is addressed. In particular, a theoretically rigorous approach is proposed for the determination of a family of optimal design curves (ODC's) which express the best (maximum optimal) noise-gain tradeoff that can be achieved - at each operating frequency - when a simultaneous constraint on amplifier input VSWR is accounted for.